FPGA VERIFICATION

Our FPGA verification services encompass thorough testing and validation, guaranteeing the reliability and performance of your FPGA design.

The key to successful FPGA design development lies in selecting effective verification criteria.

A poor verification strategy can be time-consuming and resource intensive. Thus one must rely upon capabilities and experience.

With 15+ years of experience and a deep understanding of the verification discipline, we can help you to ensure functionality, identify issues, and guarantee reliability before deployment.

FPGA CAPABILITIES

Specification
algorithms and modeling
RTL

P. LANGUAGES

  • VHDL
  • System Verilog
  • Verilog
  • HLS
  • Scripting (TCL, Python,...)
  • C/C++
  • High Level Languages
  • Matlab
  • UVM
  • OVM
SPECIFICATION
Algorithms & Modelling
rTL
Physical layout
Verification icon
Implementation and testing icon
Physical Layout
Verification
Implementation & Testing

development cycle

Deployment cycle 12 steeps. Algorithms and modeling. Spec.BEH. DES. RTL. Verification. Logic Synth timing ver.Gate Level netlist. logical ver testing. floor planning place and route. physical layout. layout ver. implementation and testing

SAMPLE PROJECTS

High Performance Data Processing FPGA Platform

Adaptive data stream management system. The solution allows content providers to analyze their quality of service (QoS) and optimize network streams based on dynamic bandwidth demands. 

FPGA implementation includes platform infrastructure and control and monitoring applications.
* TCP/IP routing tasks handling
 * Efficient multiple data stream management
* Transfer metrics for network flow control evaluation
* PCI express interface
* Remote access

Diffraction representing SAR emulation
SAR RADAR Target Emulation

System implementation of algorithms and signal processing techniques to generate SAR RADAR data, simulating the transmitted and received signals as obtained from a real SAR antenna.

FPGA implementation includes: beam-forming, polarization, bandwidth, and beam steering.

Current flow through a SOC
SoC Advanced Verification Environment

Verification of the System On Chip (SoC) designed to be the main controller of a Critical System and implemented in a FPGA.

The SoC incorporates a general purpose processor, several application specific cores and controllers connected with a multi-master AXI bus and fault detection & recovery resources.

Our expertise

  • FPGA design and verification
    (Xilinx, Intel, Microsemi)
  • Self-testing systems
  • VHDL/Verilog/System Verilog
  • Custom Core and Testbench Design
  • Verification (UVM, OVM, testbench design, debug support)
  • Limited random testing
  • Functional coverage analysis
  • Assertion-based verification
  • System Modeling
  • Space Applications
  • ASIC design support
  • Advising on EDA tools
  • Regression management

CORE DESIGN methodology

AmD Xilinx Logo white and black
Microchip Logo
Siemens logo Black and white
Logo Universal Verification Methodology
Cadence
Intel FPGA
Logo Intel Quartus and synopsys

FIELDS of interest

Satellite communications

Satellite Communication

Satellite platform  image

Satellite Platform

High performance computer image

High Performance Computing

Industrial systems icon

Industrial Instrumentation & Control

Telemetry

Cloud system icon

Cloud Systems

Video Streaming logo

Video Streaming

Radar icon

Radar

Sensor acquisition icon

Sensor Adquisition & Procesing

Communications icon

Communications

IOT icon

IOT

mobile icon

Mobile

Test system icon

Test Systems

Industries